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? semiconductor components industries, llc, 2008 february, 2008 - rev. 5 1 publication order number: mc74hc4316a/d mc74hc4316a quad analog switch/ multiplexer/demultiplexer with separate analog and digital power supplies high-performance silicon-gate cmos the mc74hc4316a utilizes silicon-gate cmos technology to achieve fast propagation delays, low on resistances, and low off-channel leakage current. this bilateral switch/multiplexer/ demultiplexer controls analog and digital voltages that may vary across the full analog power-supply range (from v cc to v ee ). the hc4316a is similar in function to the metal-gate cmos mc14016 and mc14066, and to the high-speed cmos hc4066a. each device has four independent switches. the device control and enable inputs are compatible with standard cmos outputs; with pullup resistors, they are compatible with lsttl outputs. the device has been designed so that the on resistances (r on ) are much more linear over input voltage than r on of metal-gate cmos analog switches. logic-level translators are provided so that the on/off control and enable logic-level voltages need only be v cc and gnd, while the switch is passing signals ranging between v cc and v ee . when the enable pin (active-low) is high, all four analog switches are turned off. features ? logic-level translator for on/off control and enable inputs ? fast switching and propagation speeds ? high on/off output voltage ratio ? diode protection on all inputs/outputs ? analog power-supply voltage range (v cc - v ee ) = 2.0 to 12.0 v ? digital (control) power-supply voltage range (v cc - gnd) = 2.0 v to 6.0 v, independent of v ee ? improved linearity of on resistance ? chip complexity: 66 fets or 16.5 equivalent gates ? pb-free packages are available* *for additional information on our pb-free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. http://onsemi.com marking diagrams soic-16 d suffix case 751b 1 16 pdip-16 n suffix case 648 1 16 1 16 mc74hc4316an awlyywwg 1 16 hc4316ag awlyww a = assembly location wl, l = wafer lot yy, y = year ww, w = work week g = pb-free package 1 16 74hc4316a alywg soeiaj-16 f suffix case 966 1 16 soic-16 device package shipping ? ordering information mc74hc4316an pdip-16 500 units / box mc74hc4316adr2 2500/t ape&reel mc74hc4316ang pdip-16 (pb-free) 500 units / box MC74HC4316AFEL soeiaj-16 50/tape&reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our t ape and reel packaging specifications brochure, brd8011/d. soic-16 (pb-free) mc74hc4316adr2g 2500/t ape&reel MC74HC4316AFELg soeiaj-16 (pb-free) 50/tape&reel
mc74hc4316a http://onsemi.com 2 figure 1. pin assignment 13 14 15 16 9 10 11 12 5 4 3 2 1 8 7 6 y d x d d on/off control a on/off control v cc v ee x c y c x b y b y a x a gnd enable c on/off control b on/off control function table inputs state of analog switch enable on/off control l l h h l x on off off x = don't care. figure 2. logic diagram x a a on/off control analog switch level translator analog outputs/inputs pin 16 = v cc pin 8 = gnd pin 9 = v ee gnd v ee 2 y a 1 15 x b b on/off control analog switch level translator 3 y b 4 5 x c c on/off control analog switch level translator 11 y c 10 6 x d d on/off control analog switch level translator 12 y d 13 14 enable 7 analog inputs/outputs = x a , x b , x c , x d
mc74hc4316a http://onsemi.com 3 ??????????????????????? ??????????????????????? ???? ???? ?????????????? ?????????????? ????? ????? ??? ??? ???? ???? ???? v cc ?????????????? ?????????????? ?????????????? ????? ????? ????? ??? ??? ??? ???? ???? ?????????????? ?????????????? ????? ????? ??? ??? ???? ???? ?????????????? ?????????????? ????? ????? ??? ??? ???? ???? ?????????????? ?????????????? ????? ????? ??? ??? ???? ???? ?????????????? ?????????????? ????? ????? 25 ??? ??? ???? ???? ???? ???? ?????????????? ?????????????? ?????????????? ?????????????? ????? ????? ????? ????? ??? ??? ??? ??? ???? ???? ?????????????? ?????????????? ????? ????? ??? ??? c ???? ???? ?????????????? ?????????????? ????? ????? ??? ??? c ??????????????????????? ??????????????????????? ??????????????????????? ??????????????????????? ??????????????????????? ??????????????????????? ??????????????????????? c from 65 to 125 c eiaj/soic package: C 7 mw/ c from 65 to 125 c tssop package: - 6.1 mw/ c from 65 to 125 c for high frequency or heavy load considerations, see chapter 2 of the on semic onductor high-speed cmos data book (dl129/d). recommended operating conditions ???? ???? ?????????????? ?????????????? ??? ??? ??? ??? ??? ??? ???? ???? v cc ?????????????? ?????????????? ??? ??? ??? ??? ??? ??? ???? ???? ?????????????? ?????????????? ??? ??? ??? ??? ??? ??? ???? ???? ?????????????? ?????????????? ??? ??? ??? ??? ??? ??? ???? ???? ?????????????? ?????????????? ??? ??? ??? ??? ??? ??? ???? ???? ?????????????? ?????????????? ??? ??? ??? ??? ??? ??? ???? ???? ?????????????? ?????????????? ??? ??? ??? ??? ??? ??? c ???? ???? ???? ?????????????? ?????????????? ?????????????? ??? ??? ??? ??? ??? ??? ??? ??? ??? (v in or v out ) v cc . unused inputs must always be tied to an appropriate logic voltage level (e.g., either gnd or v cc ). unused outputs must be left open. i/o pins must be connected to a properly terminated line or bus.
mc74hc4316a http://onsemi.com 4 dc electrical characteristics digital section (voltages referenced to gnd) v ee = gnd except where noted ???? ???? ???? ???? symbol ??????????? ??????????? ??????????? ??????????? ???????? ???????? ???????? ???????? ??? ??? ??? ??? ?????????? ?????????? ?? ?? ?? ?? ???? ???? ???? c ???? ???? ???? 85 c ???? ???? ???? 125 c ???? ???? ???? ???? v ih ??????????? ??????????? ??????????? ??????????? ???????? ???????? ???????? ???????? ??? ??? ??? ??? ???? ???? ???? ???? ???? ???? ???? ???? ???? ???? ???? ???? ?? ?? ?? ?? ???? ???? ???? ??????????? ??????????? ??????????? ???????? ???????? ???????? ??? ??? ??? ???? ???? ???? ???? ???? ???? ???? ???? ???? ?? ?? ?? ???? ???? ???? ??????????? ??????????? ??????????? ???????? ???????? ???????? ??? ??? ??? ???? ???? ???? 0.1 ???? ???? ???? 1.0 ???? ???? ???? 1.0 ?? ?? ?? a ???? ???? ???? ??????????? ??????????? ??????????? ???????? ???????? ???????? ??? ??? ??? ???? ???? ???? ???? ???? ???? ???? ???? ???? ?? ?? ?? a note: information on typical parametric values can be found in chapter 2 of the on semic onductor high-speed cmos data book (dl129/d). dc electrical characteristics analog section (voltages referenced to v ee ) ???? ???? ???? symbol ????????? ????????? ????????? ????????? ????????? ????????? ??? ??? ??? ??? ??? ??? ????????? ????????? ?? ?? ?? ??? ??? c ???? ???? 85 c ???? ???? 125 c ???? ???? ???? ???? ???? ???? ???? r on ????????? ????????? ????????? ????????? ????????? ????????? ????????? ????????? ????????? ????????? ????????? 2.0 ma (figures 1, 2) ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ???? ???? ???? ???? ???? ???? ???? ???? ?? ?? ?? ?? ?? ?? ?? ????????? ????????? ????????? ????????? v in = v ih v is = v cc or v ee (endpoints) i s 2.0 ma (figures 1, 2) ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ???? ???? ???? ???? ???? ???? ???? ???? ???? ???? ???? ???? r on ????????? ????????? ????????? ????????? ????????? ????????? ????????? ????????? 2.0 ma ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ???? ???? ???? ???? ???? ???? ???? ???? ?? ?? ?? ?? ???? ???? ???? i off ????????? ????????? ????????? ????????? ????????? ????????? ??? ??? ??? ??? ??? ??? ??? ??? ??? ???? ???? ???? ???? ???? ???? ?? ?? ?? a ???? ???? ???? ???? ????????? ????????? ????????? ????????? ????????? ????????? ????????? ????????? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ???? ???? ???? ???? ???? ???? ???? ???? ?? ?? ?? ?? a note: information on typical parametric values can be found in chapter 2 of the on semic onductor high-speed cmos data book (dl129/d). *at supply voltage (v cc - v ee ) approaching 2.0 v the analog switch-on resistance becomes extremely non-linear. therefore, for low-voltage operation, it is recommended that these devices only be used to control digital signals.
mc74hc4316a http://onsemi.com 5 ac electrical characteristics (c l = 50 pf, control or enable t r = t f = 6 ns, v ee = gnd) ???? ???? ???? ???? symbol ?????????????????? ?????????????????? ?????????????????? ?????????????????? ??? ??? ??? ??? ?????????? ?????????? ?? ?? ?? ?? ???? ???? ???? c ???? ???? ???? 85 c ???? ???? ???? 125 c ???? ???? ???? t plh , t phl ?????????????????? ?????????????????? ?????????????????? ??? ??? ??? ???? ???? ???? ???? ???? ???? ???? ???? ???? ?? ?? ?? ???? ???? ???? ?????????????????? ?????????????????? ?????????????????? ??? ??? ??? ???? ???? ???? ???? ???? ???? ???? ???? ???? ?? ?? ?? ???? ???? ???? ?????????????????? ?????????????????? ?????????????????? ??? ??? ??? ???? ???? ???? ???? ???? ???? ???? ???? ???? ?? ?? ?? ???? ???? ???? ???? ???? ?????????????????? ?????????????????? ??? ??? ???? ???? ???? ???? ???? ???? ?? ?? ?? ?? ?? ?????????????????? ?????????????????? ?????????????????? ?????????????????? ??? ??? ??? ??? ???? ???? ???? ???? ???? ???? ???? ???? ???? ???? ???? ???? typical @ 25 c, v cc = 5.0 v pf 15 *used to determine the no-load dynamic power consumption: p d = c pd v cc 2 f + i cc v cc . for load considerations, see chapter 2of the on semiconductor high-speed cmos data book (dl129/d). additional application characteristics (gnd = 0 v) ???? ???? ???? symbol ????????? ????????? ????????? ????????????? ????????????? ????????????? ??? ??? ??? ???? ???? ???? ???? ???? ???? c ?? ?? ?? ???? ???? ???? ???? bw ????????? ????????? ????????? ????????? ????????????? ????????????? ????????????? ????????????? , c l = 10 pf ??? ??? ??? ??? ???? ???? ???? ???? ???? ???? ???? ???? ?? ?? ?? ?? ???? ???? ???? ???? ???? ????????? ????????? ????????? ????????? ????????? ????????????? ????????????? ????????????? sine wave adjust f in voltage to obtain 0 dbm at v is f in = 10 khz, r l = 600 , c l = 50 pf ??? ??? ??? ???? ???? ???? ???? ???? ???? ?? ?? ?? ?? ?? ????????????? ????????????? ????????????? , c l = 10 pf ??? ??? ??? ???? ???? ???? ???? ???? ???? ???? ???? ???? ???? ???? ????????? ????????? ????????? ????????? ????????? ????????????? ????????????? ????????????? 1 mhz square wave (t r = t f = 6 ns) adjust r l at setup so that i s = 0 a r l = 600 , c l = 50 pf ??? ??? ??? ???? ???? ???? ???? ???? ???? ?? ?? ?? ?? ?? ????????????? ????????????? ????????????? , c l = 10 pf ??? ??? ??? ???? ???? ???? ???? ???? ???? ???? ???? ???? ???? ???? ????????? ????????? ????????? ????????? ????????? ????????????? ????????????? ????????????? sine wave adjust f in voltage to obtain 0 dbm at v is f in = 10 khz, r l = 600 , c l = 50 pf ??? ??? ??? ???? ???? ???? ???? ???? ???? ?? ?? ?? ?? ?? ????????????? ????????????? ????????????? , c l = 10 pf ??? ??? ??? ???? ???? ???? ???? ???? ???? ???? ???? ???? ???? ???? ????????? ????????? ????????? ????????? ????????? ????????????? ????????????? ????????????? ????????????? ????????????? , c l = 50 pf thd = thd measured - thd source v is = 4.0 v pp sine wave v is = 8.0 v pp sine wave v is = 11.0 v pp sine wave ??? ??? ??? ??? ??? ???? ???? ???? ???? ???? ???? ???? ???? ???? ???? ?? ?? ?? ?? ??
mc74hc4316a http://onsemi.com 6 figure 1b. typical on resistance, v cc - v ee = 4.5 v figure 1d. typical on resistance, v cc - v ee = 9.0 v figure 1c. typical on resistance, v cc - v ee = 6.0 v figure 1e. typical on resistance, v cc - v ee = 12.0 v figure 1a. typical on resistance, v cc - v ee = 2.0 v figure 2. on resistance test set-up plotter mini computer programmable power supply dc analyzer v cc + - analog in common out gnd device under test v ee tbd tbd tbd tbd tbd
mc74hc4316a http://onsemi.com 7 figure 3. maximum off channel leakage current, any one channel, test set-up figure 4. maximum on channel leakage current, test set-up off 16 v cc v ee a v cc v ee v cc o/i 7 8 9 selected control input v il on 16 v cc n/c a v ee v cc v ee 7 8 9 selected control input v ih figure 5. maximum on-channel bandwidth test set-up on 16 v cc 0.1 f c l * f in to db meter *includes all probe and jig capacitance. r l r l v ee 7 8 9 selected control input v cc figure 6. off-channel feedthrough isolation, test set-up off 16 v cc 0.1 f c l * f in to db meter *includes all probe and jig capacitance. r l v ee 7 8 9 selected control input r l v cc figure 7. feedthrough noise, control to analog out, test set-up 16 v cc *includes all probe and jig capacitance. on/off control r l selected control input v ee 7 8 9 c l * test point r l v cc gnd analog in analog out 50% t plh t phl 50% figure 8. propagation delays, analog in to analog out v is
mc74hc4316a http://onsemi.com 8 positionwhen testing t plz and t pzl figure 9. propagation delay test set-up on 16 v cc *includes all probe and jig capacitance. test point analog o/i analog i/o 50 pf* selected control input v cc figure 10. propagation delay, on/off control to analog out on/off v cc test point 16 v cc 1 k positionwhen testing t phz and t pzh 50 pf* 1 2 1 2 figure 11. propagation delay test set-up 1 2 figure 12. crosstalk between any two switches, test set-up (adjacent channels used) r l on 16 *includes all probe and jig capacitance. off r l v is f in 0.1 f figure 13. power dissipation capacitance test set-up 16 v cc n/c on/off a n/c selected control input control on 16 v cc 10 f c l * f in r l to distortion meter *includes all probe and jig capacitance. v os v is selected control input v cc figure 14. total harmonic distortion, test set-up 7 8 9 *includes all probe and jig capacitance. 8 9 control or enable v cc 7 8 9 v ee c l * c l * r l selected control input v cc test point analog i/o 7 8 9 v ee 7 8 9 v ee 50% 50% 90% 10% t pzl t plz t pzh t phz high impedance v ol v oh high impedance v cc gnd 50% analog out control enable t r t f
mc74hc4316a http://onsemi.com 9 applications information 0 -10 -20 -30 -40 -50 - 100 1.0 2.0 frequency (khz) dbm -60 -70 -80 -90 fundamental frequency device source figure 15. plot, harmonic distortion 3.0 the enable and control pins should be at v cc or gnd logic levels, v cc being recognized as logic high and gnd being recognized as a logic low. unused analog inputs/outputs may be left floating (not connected). however, it is advisable to tie unused analog inputs and outputs to v cc or v ee through a low value resistor. this minimizes crosstalk and feedthrough noise that may be picked up by the unused i/o pins. the maximum analog voltage swings are determined by the supply voltages v cc and v ee . the positive peak analog voltage should not exceed v cc . similarly, the negative peak analog voltage should not go below v ee . in the example below, the difference between v cc and v ee is 12 v. therefore, using the configuration in figure 16, a maximum analog signal of twelve volts peak-to-peak can be controlled. when voltage transients above v cc and/or below v ee are anticipated on the analog channels, external dio des (dx) are recommended as shown in figure 17. these diodes should be small signal, fast turn-on types able to absorb the maximum anticipated current surges during clipping. an alternate method would be to replace the dx diodes with mosorbs (mosorb is an acronym for high current surge protectors). mosorbs are fast turn-on devices ideally suited for precise dc protection with no inherent wear out mechanism. analog o/i on 16 v cc = 6 v analog i/o + 6 v -6 v + 6 v -6 v enable control inputs (v cc or gnd) on 16 v cc d x d x v cc d x figure 16. figure 17. transient suppressor application 8 selected control input d x selected control input + 6 v v ee -6 v v cc v ee enable control inputs (v cc or gnd) v ee v ee
mc74hc4316a http://onsemi.com 10 v cc = 5 v 16 hc4316a enable and control inputs 8 5 6 14 15 ttl analog signals r* analog signals hct buffer r* = 2 to 10 k channel 4 channel 3 channel 2 channel 1 1 of 4 switches common i/o 1234 control inputs input output 0.01 f lf356 or equivalent a. using pull-up resistors b. using hct buffer figure 18. lsttl/nmos to hcmos interface figure 19. switching a 0-to-12 v signal using a single power supply (gnd 0 v) figure 20. 4-input multiplexer figure 21. sample/hold amplifier + - 1 of 4 switches +5 v 16 hc4016a control inputs 7 5 6 14 15 lsttl/ nmos analog signals analog signals 1 of 4 switches 1 of 4 switches 1 of 4 switches 7 r* r* r* r* v ee = 0 to -6 v 9 v ee = 0 to -6 v 9 12 v power supply r 1 = r 2 r 1 r 2 v cc = 12 v v ee = 0 v gnd = 6 v 12 v pp analog input signal c r 3 r 4 v cc v ee 1 of 4 switches analog output signal 12 v 0 r 1 = r 2 r 3 = r 4
mc74hc4316a http://onsemi.com 11 package dimensions pdip-16 n suffix case 648-08 issue t soic-16 d suffix case 751b-05 issue k notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. dimension l to center of leads when formed parallel. 4. dimension b does not include mold flash. 5. rounded corners optional. -a- b f c s h g d j l m 16 pl seating 18 9 16 k plane -t- m a m 0.25 (0.010) t dim min max min max millimeters inches a 0.740 0.770 18.80 19.55 b 0.250 0.270 6.35 6.85 c 0.145 0.175 3.69 4.44 d 0.015 0.021 0.39 0.53 f 0.040 0.70 1.02 1.77 g 0.100 bsc 2.54 bsc h 0.050 bsc 1.27 bsc j 0.008 0.015 0.21 0.38 k 0.110 0.130 2.80 3.30 l 0.295 0.305 7.50 7.74 m 0 10 0 10 s 0.020 0.040 0.51 1.01 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimensions a and b do not include mold protrusion. 4. maximum mold protrusion 0.15 (0.006) per side. 5. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.127 (0.005) total in excess of the d dimension at maximum material condition. 18 16 9 seating plane f j m r x 45 g 8 pl p -b- -a- m 0.25 (0.010) b s -t- d k c 16 pl s b m 0.25 (0.010) a s t dim min max min max inches millimeters a 9.80 10.00 0.386 0.393 b 3.80 4.00 0.150 0.157 c 1.35 1.75 0.054 0.068 d 0.35 0.49 0.014 0.019 f 0.40 1.25 0.016 0.049 g 1.27 bsc 0.050 bsc j 0.19 0.25 0.008 0.009 k 0.10 0.25 0.004 0.009 m 0 7 0 7 p 5.80 6.20 0.229 0.244 r 0.25 0.50 0.010 0.019 6.40 16x 0.58 16x 1.12 1.27 dimensions: millimeters 1 pitch soldering footprint 16 89 8x
mc74hc4316a http://onsemi.com 12 package dimensions soeiaj-16 f suffix case 966-01 issue a h e a 1 dim min max min max inches --- 2.05 --- 0.081 millimeters 0.05 0.20 0.002 0.008 0.35 0.50 0.014 0.020 0.10 0.20 0.007 0.011 9.90 10.50 0.390 0.413 5.10 5.45 0.201 0.215 1.27 bsc 0.050 bsc 7.40 8.20 0.291 0.323 0.50 0.85 0.020 0.033 1.10 1.50 0.043 0.059 0 0.70 0.90 0.028 0.035 --- 0.78 --- 0.031 a 1 h e q 1 l e 10 0 10 l e q 1 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimensions d and e do not include mold flash or protrusions and are measured at the parting line. mold flash or protrusions shall not exceed 0.15 (0.006) per side. 4. terminal numbers are shown for reference only. 5. the lead width dimension (b) does not include dambar protrusion. allowable dambar protrusion shall be 0.08 (0.003) total in excess of the lead width dimension at maximum material condition. dambar cannot be located on the lower radius or the foot. minimum space between protrusions and adjacent lead to be 0.46 ( 0.018). m l detail p view p c a b e m 0.13 (0.005) 0.10 (0.004) 1 16 9 8 d z e a b c d e e l m z on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. typical parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including typicals must be validated for each customer application by customer's technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, af filiates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. mc74hc4316a/d mosorb is a trademark of semiconductor components industries, llc (scillc). publication ordering information n. american technical support : 800-282-9855 toll free ?usa/canada europe, middle east and africa technical support: ?phone: 421 33 790 2910 japan customer focus center ?phone: 81-3-5773-3850 literature fulfillment : ?literature distribution center for on semiconductor ?p.o. box 5163, denver, colorado 80217 usa ? phone : 303-675-2175 or 800-344-3860 toll free usa/canada ? fax : 303-675-2176 or 800-344-3867 toll free usa/canada ? email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative

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